The growing demand for high capacity storage devices has catalyzed the use of multi-level not and (NAND) flash memory cells, which include multi-level cells (MLC, 2 bits per cell), triple level cells (TLC, 3 bits per cell), quad level cells (QLC, 4 bits per cell), and higher capacities. As the number of bits stored in a memory cell increases, the level of precision required for reliable data programming also becomes stricter in tandem. Existing approaches for precise programming of multi-level cells may demand additional hardware resources, which increases the complexity and cost of the storage device while reducing available space for other productive uses. Thus, there is a need for a more efficient method of programming multi-level cells.
The description provided in the background section should not be assumed to be prior art merely because it is mentioned in or associated with the background section. The background section may include information that describes one or more aspects of the subject technology, and the description in this section does not limit the invention.